Projects:2020s1-1210 Performance Evaluation of Cryptographic Functions
Contents
Introduction
With the advent of an increasingly online and interconnected world, the need for fast and efficient data encryption has never been higher. In pursuit of this, the Australian Semiconductor Technology Company (ASTC) has sponsored this project to examine three kinds of implementations of cryptographic operations in a RISC-V based embedded system. The objective is to compare and evaluate the performance of software based, hardware based, and hybrid implementations of AES utilizing a dedicated co-processor supplied by ASTC.
Project Team
Project Students
- Lewis Omond
- Kieran Hunt
Project Supervisors
- Braden Phillips (The University of Adelaide)
- Peter Ashenden (ASTC)
Background
Encryption is a security measure that underpins private communication of data between devices on the internet. The Advanced Encryption Standard (AES) defines the algorithm used to encrypt data before it is sent. As a company developing processors for use in Internet of Things devices, the Australian Semiconductor Technology Company (ASTC) is interested in the performance of their designs when used for encryption tasks. To this end, ASTC have requested an investigation into processor performance when conducting encryption operations with varying degrees of hardware acceleration.
