Gallery of new files

Jump to: navigation, search

This special page shows the last uploaded files.

FrontKinect.JPG A1648351
17:18, 29 October 2017
818 × 201; 32 KB
FPGA Flowchart.png A1646796
17:16, 29 October 2017
621 × 241; 10 KB
SymmetricFilling.JPG A1648351
17:16, 29 October 2017
1,123 × 340; 80 KB
PoseCorrectedKinect.JPG A1648351
17:14, 29 October 2017
634 × 372; 56 KB
PoseCorrectedEurecom.JPG A1648351
17:14, 29 October 2017
1,125 × 386; 59 KB
KinectResultCropped.PNG A1648351
17:14, 29 October 2017
550 × 331; 149 KB
Referenceface.jpg A1648351
17:13, 29 October 2017
890 × 310; 26 KB
ResearchPhases.png A1646872
17:12, 29 October 2017
1,677 × 1,080; 1.16 MB
EURECOMDATA.jpg A1648351
17:11, 29 October 2017
750 × 367; 47 KB
NoseTipDetectionEurecom.JPG A1648351
17:08, 29 October 2017
1,229 × 379; 43 KB
TiltedHeadNose.JPG A1648351
17:06, 29 October 2017
1,103 × 306; 49 KB
CroppingKinect.JPG A1648351
17:05, 29 October 2017
935 × 304; 43 KB
EURECOMInitial.jpg A1648351
16:59, 29 October 2017
1,134 × 377; 38 KB
KinectImage.JPG A1648351
16:59, 29 October 2017
1,302 × 338; 44 KB
Capture hough.JPG A1636137
16:55, 29 October 2017
808 × 652; 36 KB
Confusion table..png A1662866
16:24, 29 October 2017
605 × 625; 270 KB
Sleepstage.png A1662866
16:17, 29 October 2017
605 × 337; 74 KB
Double Threshold.png A1643343
16:15, 29 October 2017
279 × 86; 3 KB
ANN.png A1662866
16:14, 29 October 2017
295 × 360; 56 KB
Race condition pragma output shared memory.jpg A1646441
16:02, 29 October 2017
3,439 × 1,323; 352 KB
Race condition pragma output loop.JPG A1646441
16:01, 29 October 2017
495 × 513; 55 KB
Lane Detection Procedures.png A1643343
15:22, 29 October 2017
929 × 430; 20 KB
Latency.JPG A1646441
15:15, 29 October 2017
1,073 × 531; 51 KB
Utilisation.JPG A1646441
15:14, 29 October 2017
783 × 452; 40 KB
Temperature.JPG A1646441
15:14, 29 October 2017
941 × 514; 47 KB
Power 111.JPG A1646441
15:12, 29 October 2017
742 × 458; 33 KB
Cost.JPG A1646441
15:11, 29 October 2017
618 × 369; 28 KB
Table1.JPG A1654417
15:09, 29 October 2017
417 × 602; 47 KB
Final Results.JPG A1646441
14:55, 29 October 2017
707 × 297; 61 KB
ASIC Power.JPG A1646441
14:49, 29 October 2017
496 × 278; 44 KB
ASIC timing.JPG A1646441
14:43, 29 October 2017
729 × 305; 77 KB
FPGA Devices.JPG A1646441
14:30, 29 October 2017
713 × 165; 40 KB
FPGA Clocks.JPG A1646441
14:29, 29 October 2017
694 × 205; 38 KB
Grid Size 1070 Wave Propagation.jpg A1646441
14:06, 29 October 2017
977 × 639; 93 KB
Effect of Block Size on Run Time GTX 1070 Wave Propagation.jpg A1646441
14:06, 29 October 2017
803 × 476; 61 KB
Cores vs Runtime.png A1646441
13:59, 29 October 2017
910 × 661; 37 KB
CompilerSummary.JPG A1646441
13:52, 29 October 2017
702 × 180; 36 KB
Compilers.JPG A1646441
13:46, 29 October 2017
1,568 × 1,139; 141 KB
FFT Algorithm.JPG A1646441
13:33, 29 October 2017
387 × 64; 11 KB
Reference Equation.JPG A1646441
13:31, 29 October 2017
711 × 61; 15 KB
DataFlow ReferenceEquation.jpg A1646441
13:26, 29 October 2017
806 × 752; 55 KB
Lbp.jpg A1645963
12:55, 29 October 2017
460 × 257; 30 KB
System desc.jpg A1645963
11:43, 29 October 2017
1,348 × 842; 157 KB
Estimated sparse error.PNG A1667249
23:08, 28 October 2017
867 × 299; 29 KB
L1 differences2.PNG A1667249
23:04, 28 October 2017
1,197 × 915; 95 KB
FPGA.png A1646352
20:58, 28 October 2017
610 × 294; 19 KB
OSC.png A1646352
20:42, 28 October 2017
628 × 475; 59 KB
AFG.png A1646352
20:39, 28 October 2017
628 × 460; 48 KB
WIKI.png A1646352
20:31, 28 October 2017
628 × 460; 48 KB
ISAR image processing.PNG A1639300
16:58, 28 October 2017
979 × 308; 139 KB

(newest | oldest) View (newer 50 | older 50) (20 | 50 | 100 | 250 | 500)

Retrieved from "https://projectswiki.eleceng.adelaide.edu.au/projects/index.php/Special:NewFiles"

Navigation menu