Projects:2021s1-13009 Investigation and Development of a Solar Charger with Wide Bandgap Devices

A solar battery charger design that is more efficient, compact, higher temperature-tolerant, and cost-effective than the market standard is sought after by REDARC. A solar charge controller is imperative for charging a battery with a photovoltaic (PV) panel, as PV panels typically produce a voltage that is too high for a 12V automotive battery to be able to handle without sufficient control and regulation. Most standard solar charge controllers are driven by pulse-width modulation (PWM). These are subject to high losses and are unable to quickly and efficiently adapt to dynamics of the PV power source throughout changing conditions in the day. This project proposes a solar charge controller design that uses Maximum Power Point Tracking (MPPT). An MPPT controller finds the maximum power that can be extracted from the PV panel and delivers it safely to the battery with minimal loss. To allow for higher efficiency and a compact converter package, Wide Bandgap (WBG) switching devices are used in this project's design. These replace the standard Silicon (Si) transistors found in usual solar regulators with a different material transistor such as Gallium Nitride (GaN) or Silicon Carbide (SiC). WBG devices have recently emerged in response to the limitations of existing converters (limited power density, low and variable efficiency, and sensitivity to environmental conditions) and ever extending applications (renewable energy integration, energy storage, electric vehicles, and power grid transformation). For example, WBG devices offer up to 10x faster switching speeds than traditional silicon devices, hence, offering miniaturization, can function at higher operating temperatures without active cooling, have lower breakdown voltage and lower R_DS(on).

Introduction

In this project, a solar charger will be designed and developed to utilize the distinct benefits of WBG devices. The project is broken up into two major components: the design and development of the power circuit, including the investigation and evaluation of wide bandgap devices, and the design and development of the control circuit, including the integration of established MPPT software and signal control. The image on the right demonstrates the scope of this project. The solar charge controller is the device that interfaces between the photovoltaic (PV) panel power source and the 12V battery (load).

The desirable interfacing characteristic features of the charger/converter are:

• Higher voltage PV panels (20 ~ 60V).
• Current rating: 20 ~ 40A.
• Regulated output voltage: 12 ~ 16.5V.
• Non-Isolated step up/down operating under current limited voltage control mode.
• Higher frequency switching.
• High efficiency in a wide power range.
• High power density.
• High operating temperature.

Project team

Project students

• Duncan Black

• Jacob Tilley

Supervisors

• A/Prof. Nesimi Ertugrul
• Dr. Said Al-Sawari
• Mr. Don Terrace (REDARC Electronics Pty Ltd)

Background

• REDARC are interested in developing high performing solar charge controllers
• Opportunity to implement a MPPT-controlled DC-DC converter using established MPPT algorithm.

Objectives

The primary aim for this project is:

• To determine the suitability of WBG devices to be used in this commercial application.

This will be conducted by evaluating:

• Efficiency of a DC-DC converter system using WBG devices and MPPT controller.
• Performance in high operating temperatures and load current conditions.
• Ability to miniaturise passive components using higher switching-frequency capable devices.

The secondary aim for this project is:

• To develop a workable solar charge controller prototype.

The Solar Regulator Prototype shall satisfy the following requirements:

• Input Interface (Solar Panel):
  • • 24 – 60V range
    • PWM high-frequency switching (< 1 MHz)
    • Maximum input power controlled by REDARC MPPT algorithm
  • Output Interface (12V Battery):
    • Regulated 14.5-16.5V
    • Regulated 40A
  • Physical Requirements:
    • Size approx. that of A5 Diary (approx. 150x210mm)
  • Component Requirements:
    • Must be able to withstand 60V and 40A whilst maintaining high switching frequency characteristics

Maximum Power Point Tracking

Solar panels are not very smart and will not output their maximum power without some active assistance. The figure on the left shows the Voltage- Current curve of a solar panel (red line) and the resultant power curve (blue line) by adjusting the voltage of the solar panel, the maximum power point (MPP) can be found. The method used to find this point is called Maximum Power Point Tracking (MPPT). A simple method for finding the MPP is called Perturb and Observe. This method calculates the power output of the panel, changes the voltage slightly (by adjusting the duty cycle of the DC-DC converter) and recalculates the power output. If power has increased, keep adjusting the voltage in the same direction and vice-versa.

STM32 Microcontroller

the development of the MPPT control system using STM32 was executed as follows:

• A Microcontroller was chosen, specifically one that contained the HRTIM (High Resolution Timer) peripheral. This was integral to our project as we operated at high frequency (~1MHz). Our chosen device was the STM32G474RE-NUCLEO board for development.
• A language was chosen for development. The language chosen was C, as C is good for 'bare metal' programming in embedded systems.
• Hardware Abstraction Layer programming was used for the implementation of the Voltage and Current sensing, HRTIM implementation and GPIO configuration.
• The MPPT algorithm was programmed.
• Each of these were tested as modules then finally as a full system.
• The completed code was integrated with the rest of the control circuit, followed by integration testing with the power circuit.

A block diagram of the control circuit can be seen to the right.

The system uses the voltage and current sensed at the input to inform the calculation of the required duty cycle to achieve the desired output voltage. The microcontroller then applies the calculated duty cycle to the High-Resolution timer peripheral's PWM.

The HRTIM peripheral operates at 5.44GHz. If we desire a 1 microsecond period, that corresponds to a pulse frequency of 1MHz. This gives us 5440 descrete points each pulse which corresponds to a precision of 0.018% for our duty cycle. This is an excellent level of precision and allows very accurate control of the PWM in our circuit.

This PWM signal is then applied to the gate drivers for the FETs. Gate drivers are needed as the output from the microcontroller can be quite noisy. This happens due to crosstalk, which is much more significant an issue when operating at high frequency. The gate driver both smooth out this signal, and ensure that the correct voltage can be applied to the gate for it to switch quickly and efficiently.

A Simple P&O MPPT Algorithm

We then slightly adjust the PWM frequency and check whether the total power recieved from the solar panel has increased. If it has, we keep adjusting in the same direction. This can be seen in the image below. This image is an example of a simple "Perturb and Observe" MPPT algorithm.

To validate the MPPT operation of the control circuit, shown to the right is the real-world test setup conducted. For this, we connected the STM32G474RE-NUCLEO board to the signal conditioning boards discussed below. The solar panel was connected on the other side of one of these boards. This stepped the voltage and current values to a level where they were readable by the system. The read values were spot on when compared to the reading on the electronic load which was used to simulate a battery in our circuit.

Signal Conditioning

The control circuit uses an Analog to Digital Converter (ADC) to read the voltage and current. The microcontroller has 2 limitations however,

• it can only read voltages
• maximum voltage it can read is the voltage the microcontroller is powered by (3.3V - 5V).

To read voltages in the 12-30V range, which is well beyond the capacity of our microcontroller, we have designed a custom signal conditioning circuit as shown in image (left). Voltage Sensing: Using a voltage divider at the input and output terminals to the regulator, we step down the voltage which is then applied a fixed gain by the operational amplifier (op-amp). Current Sensing: The current is read using a shunt resistor which operates at a fixed resistance (200μΩ). This produces a small voltage drop (mV) that can then be applied a large gain to a suitable voltage for the microcontroller to process. This is converted back to current reading through a pre-determined coefficient.

Power Circuit and Wide Bandgap Devices

Many DC-DC converter topologies were studied for their suitability for this project. The topology that was decided upon was the 4-switch synchronous buck-boost converter, shown in image to the right. The key advantages of using a buck-boost converter topology over a synchronous buck DC-DC converter or otherwise are the ability to regulate the voltage output at all times, even if the PV system is outputting less than the nominal operating voltage used in the “buck” configuration, and catering for both the series and parallel PV panel system configurations. Given a PWM signal from a MPPT control system, the power circuit output must hold one of either voltage or current constant and regulate the other. Hence, as the proposed DC-DC converter must hold the voltage constant, the current must be regulated.
Gallium Nitride (GaN) and Silicon Carbide (SiC) transistors are expected to provide the following benefits to consumer electronics:

• Lower R_DS(on) -> Lower Conduction Losses
• Comparable R_DS(on) at smaller die size -> Lower Capacitance (C) and lower gate charge (Q_c) -> lower switching losses -> faster switching frequency -> smaller passive circuit elements

Simulation Configuration

GaN and SiC devices have been shown to experience variable switching losses at elevated junction temperatures. This phenomenon can be explained based on the relationship between the device junction temperature and the transconductance. The temperature-dependent feature of switching loss should be considered in the power converter design.

The circuit shown in LTSPICE simulation software to the left demonstrates the synchronous buck converter topology with two GaN switches. The switches' gates are driven by a simple modelled PWM waveform; the frequency and duty cycle of which can be set as desired. This circuit is a simplified representation of the Infineon IGI60F1414A1L GaN evaluation board studied in this project, with identical inductor and capacitors implemented on this board.

GaN Switching Device Analysis

Shown to the right is the hard switching turn-on process for GaN devices installed in the circuit above. Note the ringing in the drain-source voltage and drain current is partially due to additional inductance installed at the gate, to more accurately model gate driver parasitics.

The turn-on switching period is divided into three main time intervals (t0-t1, t1-t2, t2-t3). At t0, the gate current starts to charge C_iss exponentially and V_GS<V_G(th). Theoretically, there is no drain-to-source current, however we observe a small leakage current, being dissipated to heat (>100mA). This GaN device has a very low C_iss (242pF) which results in a low gate driver loss and short delay time.

After t1, as V_GS>V_G(th) , I_D begins to rise, reaching the inductor load current at t2. The GaN device operates in the saturation region between t1-t2, generating V/I overlapping switching loss. This overlapping switching loss increases with higher junction temperature [22]. At t2, I_D passes the load current and continues to rise. The output capacitance C_oss of the low-side GaN device begins to discharge internally (E_oss loss is exhibited) while I_D charges the high-side C_oss (E_qoss loss is exhibited). V_DS begins to fall. This generates V/I overlapping switching loss, E_VIon. The total turn-on loss can then be calculated as: E_{(on,measured)}=E_VIon+E_qoss

Results

Switching Losses

It is critical that we evaluate the loss the switch presents to the overall circuit. Switching loss can be quantified by calculating (E_on+E_off) x f_sw. Shown to the right are the switching losses evaluated for GaN and Si tested devices. The test parameters were Vin = 25V, Vout = 14.5V and Iout = 2A at 150kHz and 300kHz. The switching loss of the GaN device at 150kHz was found to be P_sw=0.812W, while the Si device was found to be P_sw=1.929W (ΔP_sw=1.117W). However, when operating the same circuit at 300kHz, the P_sw of GaN was found to be P_sw=1.624W, and for Si, P_sw=3.857W (ΔP_sw=2.233W). This demonstrates that at higher frequencies, the measured GaN device provides a significant performance improvement over the Si device. For instance, at 150kHz GaN provides a 1.117W saving, whereas at 300kHz GaN provides a 2.233W saving.

System Efficiency Performance

This can be furthered into evaluation of overall system efficiency of the synchronous buck circuit with WBG devices. The same circuit as shown above was simulated for a controlled load-current sweep from 2 to 20 Amps, in increments of 2A. The GaN switches were then swapped-out with SiC switches, followed by Si switches. It was found, switching at 230kHz (period of 4.4 us), the system efficiency followed a similar trend, starting low (88% for Si, 90% for SiC, 91% for GaN) and quickly reaching a peak efficiency (around 96% for GaN and SiC, and 95% for Si), before gradually decreasing with increased load current. Switching at 1MHz (shown to the left), however, we see a more distinct shift in the performance of the Si, SiC and GaN systems. The GaN DC-DC converter exceeds the performance of the SiC and Si systems at higher frequencies emmensely.

Thermal Performance Analysis

From the results , it appears that a higher turn-on switching loss E_on of GaN is observed with higher junction temperature, and a slight change in turn-off switching loss E_off is observed with variable junction temperature; consistent with theoretical analysis given above. The simulated results show that the efficiency and junction temperature while using GaN HEMTs performed better than the SiC and Si MOSFETs under the same test conditions. At 200kHz, the power loss through the GaN switch was 59% that of SiC, on average. The superior performance of GaN vs SiC can be attributed to the lower switching loss it exhibits. As the conduction loss of the GaN device is small, the switching loss (E_on+E_off) x f_sw accounted for over 80% of the device’s total power loss. Thus, as the switching frequency increases, GaN devices will perform better than that of SiC devices.

Lastly, this can be furthered into physical thermal testing of the GaN and Si device evaluation boards. The performance of each device was measured in terms of system efficiency over a range of operating temperatures, to evaluate thermal performance. The image to the left demonstrates the testing configuration for the Infineon GaN evaluation board.

The tests were run for the maximum capable output current (4A) for the two boards for a duration of 5 minutes. After just 4 minutes, the Infineon board switching devices and gate driver IC exceeded 110 degrees Celcius.

IR camera proved to be the most accurate and reliable source of experimental temperature measurement. Thermal couples only read heat sink temperature and was not a reliable reading.

These results can be summarised by the graph below, detailing both physical measured GaN and Si devices, and simulated GaN, SiC and Si devices over the range of operating temperatures exhibited.

UG13009 Efficiency vs Temperature (1MHz)

UG13009 Efficiency vs Temperature (150kHz)

Conclusion

The results clearly demonstrate that the performance of the GaN switching devices (FETs) analysed and used in this project exceed the performance of both the Si and SiC MOSFETs analysed and used in this project, in terms of switching speed, parasitic capacitances, switching loss as well as thermal performance. This follows the underlying theory that GaN E-HEMTs are more robust and reliable switching devices under higher current, higher temperature and higher switching loads. These devices certainly provide opportunity for construction of significantly more compact and efficient DC-DC converter designs.
Furthmore:

• GaN devices measured (simulation and real-world) exceeded the performance of the SiC and Si systems at higher frequencies.
• GaN devices exhibited less switching loss than SiC.
• The GaN system performed better at higher operating temperatures.
• SiC switching losses decreased with higher junction temperature but were not less than GaN’s
• GaN benefits from lower parasitic capacitance
• The WBG devices investigated have high RDS(on) and so losses could be minimised further by choosing devices with lower R DS(on).

Prototype Design

A prototype design was created (shown below) that combined all of the PCB and circuit design techniques learned as part of this project. This design was not furthered to PCB production but demonstrates the need for safety, filtering and other critical design aspects for DC-DC converters. This DC-DC converter design will implement the STM32 control circuit and GaN devices.

Gantt Chart

Below demonstrates some of the planning that allowed for the successful execution of the project.

Initial Risk Assessment:

• Safety as a Major Risk:
  • COVID-19 Impact on Project
  • Build and Test
    • Electric Shock (~580W maximum exposure)
    • Mitigation: SOP to be written for planned task
  • Laboratory Hazards
    • Soldering Burns
    • Electric Shock from Equipment
• Schedule Risks to consider:
  • Inadequate background knowledge and understanding of the context of research
    • Allow sufficient time to develop research
  • Implementation failed to achieve goals due to poor design
    • Allow sufficient time to develop design and consider alternatives
• Risks to Cost:
  • Initial Projection: evaluation board, variety of Wide Bandgap Devices
    • Material costs can be covered by the University.
  • REDARC sponsorship allows us to use industry-leading production facilities.
    • Risk to budget is considered a minor risk.